Design of an 8-Channel 40 GS/s 20 mW/Ch Waveform Sampling ASIC in 65 nm CMOS Digital Design and Implementation for the PSEC5 40 GS/s waveform-sampling ASIC A Modular Test System for the PSEC5 40 GS/s waveform-sampling ASIC The Role of...
Revision 0 of the Margherita User's Manual. This document was written as a draft, to be revised as we learn more and more about how to operate and fabricate a tile with the Margherita dual vacuum chamber fabrication system.