Design of an 8-Channel 40 GS/s 20 mW/Ch Waveform Sampling ASIC in 65 nm CMOS Digital Design and Implementation for the PSEC5 40 GS/s waveform-sampling ASIC A Modular Test System for the PSEC5 40 GS/s waveform-sampling ASIC The Role of...
Those are the Project files for Anodes(Square, Sin, and Stripline), with Kicad files for PCB Design, Fabrication instructions, Gerber files, and a Jpeg for quick reference. The current version is on Jan 11, 2021, and sent for fabrication.