A draft document describing some issues with respect to the interactions of the High Level DAQ (ie on DAQ PC) and the DAQ device Firmware. Specific application to 160 channel PSEC3/4 center card FPGA configuration. Dec 2, 2011 Ed May
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Abstract #: 2017 Paper ID: N42-320 Title: Charge Relaxation and Gain Depletion for Candidate Secondary Electron Emission Materials Session Info: N42: Scientific Simulation and Computation: posters; on Wednesday, Nov. 3 @ 10:30 in room: Exhibit Hall B